Thermal reliability faces critical challenges from emerging FinFET-based designs. As designs transition from planar MOS to FinFET transistors, current density increases by 25% and that combined with lower thermal conductivity substrate and 3-D narrow fin structure, local heat gets trapped resulting in thermal-aware EM issues. This presentation introduces Sentinel-TI™, a thermal integrity platform and demonstrates how Chip Thermal Model (CTM™) based power-thermal convergence and interconnect-driven methodology help address the thermal reliability challenges associated with these design. Learn more on our website: https://bit.ly/1sh7I8p, https://bit.ly/1CW3FRT, https://bit.ly/1qk5Juj and (https://bit.ly/1rtrGat)